Created attachment 247112 [details] Patch

AAPCS (http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf) says that r4-r11 are callee-saved registers, only the role of r9 isn't clear. "The role of register r9 is platform specific. A virtual platform may assign any role to this register and must document this usage. For example, it may designate it as the static base (SB) in a position-independent data model, or it may designate it as the thread register (TR) in an environment with thread-local storage. The usage of this register may require that the value held is persistent across all calls. A virtual platform that has no need for such a special register may designate r9 as an additional callee-saved variable register, v6." But it seems GCC ARM EABI handles r9 as callee-saved register: https://github.com/gcc-mirror/gcc/blob/master/gcc/config/arm/arm.h#L775 I checked some disassembly of example codes and JSC too, and can confirm that r4-r11 registers are callee-saved.

You omitted the fp/r7 from ARM Thumb2 callee-saved register list: http://trac.webkit.org/browser/trunk/Source/JavaScriptCore/jit/RegisterSet.cpp#L84 But registersToPreserve() explicitly removes fp from the list: http://trac.webkit.org/browser/branches/jsCStack/Source/JavaScriptCore/jit/RegisterPreservationWrapperGenerator.cpp#L37 I think it is confusing to omit r11/fp on ARM Traditional and r7/fp on ARM Thumb2, since these registers are general callee-saved registers. ARM EABI doesn't specify a dedicated frame pointer, additionally GCC omits using frame pointer with O1.

Comment on attachment 247112 [details] Patch Clearing flags on attachment: 247112 Committed r180667: <http://trac.webkit.org/changeset/180667>

All reviewed patches have been landed. Closing bug.