Bug 251284 - [JSC] Add strength reduction for SIMD Vector logic operations
Summary: [JSC] Add strength reduction for SIMD Vector logic operations
Status: RESOLVED FIXED
Alias: None
Product: WebKit
Classification: Unclassified
Component: JavaScriptCore (show other bugs)
Version: WebKit Nightly Build
Hardware: Unspecified Unspecified
: P2 Normal
Assignee: Yusuke Suzuki
URL:
Keywords: InRadar
Depends on:
Blocks:
 
Reported: 2023-01-27 11:23 PST by Yusuke Suzuki
Modified: 2023-01-27 16:34 PST (History)
1 user (show)

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Description Yusuke Suzuki 2023-01-27 11:23:48 PST 
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Comment 1 Radar WebKit Bug Importer 2023-01-27 11:24:05 PST 
<rdar://problem/104754015>
Comment 2 Yusuke Suzuki 2023-01-27 11:33:13 PST 
Pull request: https://github.com/WebKit/WebKit/pull/9246
Comment 3 EWS 2023-01-27 16:34:32 PST 
Committed 259514@main (3f2afe08ec3b): <https://commits.webkit.org/259514@main>

Reviewed commits have been landed. Closing PR #9246 and removing active labels.