NEW206912
Experiment with tweaking the alignment of instructions to avoid the perf issues from the recent Intel microcode update 
https://bugs.webkit.org/show_bug.cgi?id=206912
Summary Experiment with tweaking the alignment of instructions to avoid the perf issu...
Robin Morisset
Reported 2020-01-28 15:55:28 PST
See https://www.intel.com/content/dam/support/us/en/documents/processors/mitigations-jump-conditional-code-erratum.pdf I am starting with a very basic patch which only deals with the simplest cases, in order to test if it actually brings us anything.
Attachments
WIP (18.99 KB, patch)
2020-01-28 15:55 PST, Robin Morisset 		no flags
DetailsFormatted DiffDiff
View All Add attachment proposed patch, testcase, etc.
Robin Morisset
Comment 1 2020-01-28 15:55:48 PST
Created attachment 389080 [details] WIP
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